Sr Digital Design Engineer (contract) - Advanced Technology Innovation Corp.
Mesa, AZ 85205
About the Job
US CITIZENSHIP REQUIRED
Must be willing & able/eligible to obtain DOD Clearance
Pay determined by extent of listed "desired" exp, esp the 1st five
MINIMUM QUALIFICATIONS
Must be willing & able/eligible to obtain DOD Clearance
Pay determined by extent of listed "desired" exp, esp the 1st five
MINIMUM QUALIFICATIONS
- B.S. in EE or CE
- Min 5+ up to 30 yrs work exp in programmable logic design.
- Recent experience with VHDL for FPGA or ASIC design.
*** In order of importance, esp the 1st five
- Formal verification experience with OSVVM methodology
- Extensive Aerospace FPGA experience esp DO-254 or RAD HARD
- Active Department of Defense Secret Security Clearance
- Protocols such as UART, SPI, I2C, 1-Wire, Ethernet, AXI, APB, SpaceWire
- Fixed-point math
- Static timing analysis and timing closure
- Asynchronous clock domain crossing
- Test-bench development, i.e. bus functional models, functional coverage
- Mentor Graphics ModelSim or QuestaSim
- Xilinx Vivado
- Lattice Radiant
- Microsemi Libero
- Other EDA Tools
- Agile environments, e.g., Jira and/or Git
Source : Advanced Technology Innovation Corp.