Silicon Test Engineering Manager - Google

Minimum qualifications:Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related field or equivalent practical experience.8 years of experience in the semiconductor industry.5 years of experience in integrated circuit qualification, data review, production release, System Level Testing, test time reduction and yield improvementExperience in leading cross-functional teams and driving technology development with vendors or suppliers.Preferred qualifications:Experience in system level testing using Advantest system level test (SLT) platform.Experience in Automatic Test Equipment (ATE) test platforms such as Advantest 93K , teradyne ultra flex SOC test system.Experience in SERDES, PCIe, double data rate (DDR) and mixed-signal circuits such as analog-to-digital converter (ADC), digital-to-analog converter(DAC), phase-locked loop (PLL), low-dropout regulator (LDO) and their performance measurements.Knowledge of process technology, and how it relates to design and testing data analysis, wafer sort, or final test.
About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products.
You'll contribute to the innovation behind products loved by millions worldwide.
Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.In this role, you will help develop and deploy a comprehensive test solution using Automatic Test Equipment (ATE) for high volume manufacturing at Floating Action Button(FABs), extended workforce Semiconductor Assembly and Test (OSATs), etc.
You will help integrate SoC technologies into devices and facilitate ATE manufacturing testing of SoC to validate performance and screen out devices.
You will own all aspects of testing and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs.
You will have an understanding of Integrated Circuit (IC) flows, wafer processing, testing, qualification and failure analysis is expected.
You will work with various groups to develop digital and mixed signal tests, automation methodologies, develop or support internal tools for test program generation, vector tracking, test program release, etc.
You will work on releasing cost effective production test solutions into mass production.
You will combine the best of Google AI, Software, and Hardware to create radically helpful experiences.
You will research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful.Google's mission is to organize the world's information and make it universally accessible and useful.
Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences.
We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful.
We aim to make people's lives better through technology.The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits.
Our salary ranges are determined by role, level, and location.
The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations.
Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
Learn more about benefits at Google.
Responsibilities Lead a team of individuals to set and communicate individual and team priorities that support organizational goals.
Meet regularly with individuals to discuss performance and development, and provide feedback and coaching.Work on ATE test program development on UFLEX, 93K, or other ATE platforms, ATE Loadboard or Probe card design for NPI on UFLEX, 93K, or other ATE platforms.Work on integrated circuit product bring-up, verification and characterization on ATE New Product Introduction production program release.
Trouble-shooting on different failure mode and test coverage improvement on ATE.Develop new products Defective parts per million(DPPM) correlation, and product correlation between system and ATE.Plan production sustaining support including production program upgrade and release, lot disposition, extended test time reduction and yield improvement, return merchandise authorization analysis, etc.