Senior Validation Engineer - Memory Coherency Fabric Systems at Intel
Boston, MA 02108
About the Job
Job Details:Job Description: Do Something Wonderful!Intel put the Silicon in Silicon Valley.
No one else is this obsessed with engineering a brighter future.
Every day, we create world changing technology that enriches the lives of every person on earth.
So, if you have a big idea, let's do something wonderful together.
Join us, because at Intel, we are building a better tomorrow.Who We AreThe DCAI and Silicon Eng Team (DASE) deliver leadership Xeon products to cloud and datacenter customers through development of industry leading x86 core and differentiated IPs that enhances product performance and competitiveness in both Xeon and AI platforms.
IP design group within DCAI designs Coherent Fabric IP, Memory controller, NOC, PCIE and many fundamental building blocks for the Xeon server SOCs.Who You AreWe are seeking a highly skilled Senior Validation Engineer to lead the verification and validation of advanced memory coherency fabric systems for next-generation data center and AI chips.
The ideal candidate will have a strong background in pre-silicon validation, a deep understanding of memory coherency protocols and interconnect architectures, and hands-on experience developing comprehensive testbenches and validation strategies.Your responsibilities include but not limited to:Develop and execute pre-silicon validation plans for memory coherency protocols and interconnect components.Create and maintain reusable, scalable, and high coverage testbenches in SystemVerilog/UVM.Implement directed and random test cases to validate complex coherency fabric designs.Collaborate with architects, RTL designers, and firmware teams to ensure thorough understanding of system requirements and features.Debug design issues by analyzing waveforms, traces, and log files, and work closely with the design team to resolve bugs.Drive functional coverage closure and identify coverage gaps through detailed analysis.Implement assertions and checkers to monitor protocol compliance and system correctness.Perform system-level validation and assist in post-silicon bring-up and debug, as needed.Provide technical mentorship to junior engineers and actively participate in design and validation reviews.Stay current with industry trends and new methodologies in verification and validation.Strong analytical and debugging skills.Excellent communication and teamwork abilities.A detail-oriented mindset with a commitment to quality.Qualifications:Minimum QualificationsGraduate of Bachelor’s Degree in Electrical Engineering, Computer Engineering, or a related field with at least 4+ years’ experience in pre-silicon verification/validation of SoC designs, with expertise in memory systems and interconnect architectures OR;Graduate of Master’s Degree in Electrical Engineering, Computer Engineering, or a related field with at least 3+ years’ experience in pre-silicon verification/validation of SoC designs, with expertise in memory systems and interconnect architectures OR;PhD in Electrical Engineering, Computer Engineering, or a related field.Technical Experience:Knowledge of memory coherency protocols (e.g., MESI, MOESI, CXL, CCIX, CHI).Proficiency in SystemVerilog and UVM for building robust testbenches.Experience with simulation tools such as Synopsys VCS, Cadence XceliumExpertise in debugging tools like Verdi, DVE, or SimVision.Knowledge with performance analysis tools and techniques.Experience with scripting languages such as Python, Perl, or TCL for workflow automation.Preferred SkillsKnowledge with post-silicon validation and system bring-up processes.Experience with high-bandwidth memory (HBM), DDR, or similar memory technologies.Knowledge of NoC architectures and interconnect protocols (e.g., AMBA AXI, ACE).Knowledge in AI/ML accelerators or data center SoC validation.Understanding of formal verification techniques.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Massachusetts, Beaver BrookBusiness group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices.
The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits:We offer a total compensation package that ranks among the best in the industry.
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
Find more information about all of our Amazing Benefits here:Annual Salary Range for jobs which could be performed in the US:$144,501.00-$217,311.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
• Job posting details (such as work model, location or time type) are subject to change.SummaryLocation: US, California, Santa Clara; US, Massachusetts, Beaver BrookType: Full time
No one else is this obsessed with engineering a brighter future.
Every day, we create world changing technology that enriches the lives of every person on earth.
So, if you have a big idea, let's do something wonderful together.
Join us, because at Intel, we are building a better tomorrow.Who We AreThe DCAI and Silicon Eng Team (DASE) deliver leadership Xeon products to cloud and datacenter customers through development of industry leading x86 core and differentiated IPs that enhances product performance and competitiveness in both Xeon and AI platforms.
IP design group within DCAI designs Coherent Fabric IP, Memory controller, NOC, PCIE and many fundamental building blocks for the Xeon server SOCs.Who You AreWe are seeking a highly skilled Senior Validation Engineer to lead the verification and validation of advanced memory coherency fabric systems for next-generation data center and AI chips.
The ideal candidate will have a strong background in pre-silicon validation, a deep understanding of memory coherency protocols and interconnect architectures, and hands-on experience developing comprehensive testbenches and validation strategies.Your responsibilities include but not limited to:Develop and execute pre-silicon validation plans for memory coherency protocols and interconnect components.Create and maintain reusable, scalable, and high coverage testbenches in SystemVerilog/UVM.Implement directed and random test cases to validate complex coherency fabric designs.Collaborate with architects, RTL designers, and firmware teams to ensure thorough understanding of system requirements and features.Debug design issues by analyzing waveforms, traces, and log files, and work closely with the design team to resolve bugs.Drive functional coverage closure and identify coverage gaps through detailed analysis.Implement assertions and checkers to monitor protocol compliance and system correctness.Perform system-level validation and assist in post-silicon bring-up and debug, as needed.Provide technical mentorship to junior engineers and actively participate in design and validation reviews.Stay current with industry trends and new methodologies in verification and validation.Strong analytical and debugging skills.Excellent communication and teamwork abilities.A detail-oriented mindset with a commitment to quality.Qualifications:Minimum QualificationsGraduate of Bachelor’s Degree in Electrical Engineering, Computer Engineering, or a related field with at least 4+ years’ experience in pre-silicon verification/validation of SoC designs, with expertise in memory systems and interconnect architectures OR;Graduate of Master’s Degree in Electrical Engineering, Computer Engineering, or a related field with at least 3+ years’ experience in pre-silicon verification/validation of SoC designs, with expertise in memory systems and interconnect architectures OR;PhD in Electrical Engineering, Computer Engineering, or a related field.Technical Experience:Knowledge of memory coherency protocols (e.g., MESI, MOESI, CXL, CCIX, CHI).Proficiency in SystemVerilog and UVM for building robust testbenches.Experience with simulation tools such as Synopsys VCS, Cadence XceliumExpertise in debugging tools like Verdi, DVE, or SimVision.Knowledge with performance analysis tools and techniques.Experience with scripting languages such as Python, Perl, or TCL for workflow automation.Preferred SkillsKnowledge with post-silicon validation and system bring-up processes.Experience with high-bandwidth memory (HBM), DDR, or similar memory technologies.Knowledge of NoC architectures and interconnect protocols (e.g., AMBA AXI, ACE).Knowledge in AI/ML accelerators or data center SoC validation.Understanding of formal verification techniques.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Massachusetts, Beaver BrookBusiness group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices.
The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits:We offer a total compensation package that ranks among the best in the industry.
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
Find more information about all of our Amazing Benefits here:Annual Salary Range for jobs which could be performed in the US:$144,501.00-$217,311.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
• Job posting details (such as work model, location or time type) are subject to change.SummaryLocation: US, California, Santa Clara; US, Massachusetts, Beaver BrookType: Full time