IC/Digital Mixed Signal Verification Engineer with Security Clearance at Associates Systems LLC

All Qualified Resumes Responded to in 24 Hrs or Less All Levels of Experience encouraged to apply. US Citizen a MUST. Required Education: Bachelor's degree in a technical area (BSEE or other Engineering discipline preferred) with 5 years of relevant experience (3 years with technical MS) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog)
OR
Bachelor's degree in a technical area (BSEE or other Engineering discipline preferred) with 9 years of relevant experience (7 years with technical MS; 4 years with PhD) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) Required Skills: Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog)
Experience with SystemVerilog Assertions (SVA)
Knowledge of Universal Verification Methodology (UVM)
Familiarity with a coverage driven verification methodology from planning through closure
Knowledge of industry standard interfaces
Experience with object oriented programming languages and concepts Desired Skills: Advanced Degree either MS or PhD
Experience with Mentor Graphics and/or Cadence Verification tools - FPGA/ASIC Design experience
Knowledge of digital signal processing
Experience with scripting languages (Bash, Perl, Python, Tcl) #CJ