Hardware Engineering and R&D - Hardware Design Engineer 4 Hardware Design Engineer 4 - HireTalent
Mountain View, CA 94043-0000
About the Job
Job Title: Hardware Engineering and R&D - Hardware Design Engineer 4
Job Location: Mountain View, CA (Hybrid)
Job Duration: 3 Months on W2
Summary:
The main function of the Hardware Design Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans.
Job Responsibilities:
" Define, document, and implement a UVM verification environment including agents and scoreboards
" Write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral
" Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes
" Support post-silicon verification activities of the products working with design and product teams
Skills:
" Proficient in using C/C++, Systemverilog and VMM/OVM/UVM
" Experience in pre and post silicon verification test flow and automated test benches
" Effective communication, collaboration, and teamwork skills
Education/Experience:
" Bachelor s degree in Electrical Engineering, Computer Engineering, Computer Science, or related degree required
"8-10 years of relevant experience required.
Top 3 Hard Skills Required + Years of Experience
" Proficient in using C/C++ (5+YOE)
" Systemverilog (5+ YOE)
" UVM experience required (5+ YOE) - VMM/OVM is a plus
Job Location: Mountain View, CA (Hybrid)
Job Duration: 3 Months on W2
Summary:
The main function of the Hardware Design Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans.
Job Responsibilities:
" Define, document, and implement a UVM verification environment including agents and scoreboards
" Write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral
" Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes
" Support post-silicon verification activities of the products working with design and product teams
Skills:
" Proficient in using C/C++, Systemverilog and VMM/OVM/UVM
" Experience in pre and post silicon verification test flow and automated test benches
" Effective communication, collaboration, and teamwork skills
Education/Experience:
" Bachelor s degree in Electrical Engineering, Computer Engineering, Computer Science, or related degree required
"8-10 years of relevant experience required.
Top 3 Hard Skills Required + Years of Experience
" Proficient in using C/C++ (5+YOE)
" Systemverilog (5+ YOE)
" UVM experience required (5+ YOE) - VMM/OVM is a plus
Source : HireTalent