Hardware Engineer - Zachary Piper LLC
Saratoga, CA NotAv
About the Job
Piper Companies is seeking a senior Hardware Engineer with strong experience from the design process through to product release. The ideal Hardware Engineer must be willing to work onsite 5 days a week in Saratoga, CA.
Responsibilities for the Hardware Engineer include:
· Lead the hardware development through elaborate test plans.
· Implement Cadence and Allegro for designing schematics.
· Work closely together with Signal Integrity engineers.
· Identify and fix hardware issues in the lab through the use of analyzers and oscilloscopes.
Qualifications for the Hardware Engineer include:
· 10+ years of experience with system-level development.
· Advanced understanding of 100G+ Ethernet and high-speed Serdes interfaces (56/112/224G), with in-depth knowledge of high-speed design and SI
· Strong understanding of x86 architecture and control interfaces (PCle, MDIO, SPI, 12C)
· Hands on experience with PCB and with Cadence Concept and Allegro
· Bachelor’s or master’s degree in Electrical Engineering, Mechanical Engineering, or a related field
· Must be eligible to work in the United States and obtain and maintain an Active U.S Government Secret Clearance
Compensation for the Hardware Engineer include:
· Salary range: $200,000 - $285,000 annually
· Comprehensive benefit package; Cigna Medical, Cigna Dental, Vision, 401k w/ ADP plus PTO, Sick leave if required by law, and Paid Holidays
Keywords: Hardware engineer, hardware, engineer, design process, design, product release, product, cadence, cadence concepts, cadence concept, allegro, signal integrity, lab, analyzers, analyzer, oscilloscopes, oscilloscope, system-level development, system level development, system level, ethernet, high-speed, high speed, serdes, x86, x86 architecture, control, control interfaces, PCle, MDIO, SPI, 12C, PCB, design validation, validation
#LI-BH1
#LI-ONSITE
This job opens for applications on 1/10/2025. Applications for this job will be accepted for at least 30 days from the posting date.