Hardware Design Engineer, FPGA, PCB Design - Google

Sunnyvale, CA

About the Job

Minimum qualifications:

Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
4 years of experience working in enterprise hardware systems design, or 3 years of experience with an advanced degree.
Experience with FPGA/CPLD design flows using Lattice, Xilinx/AMD, or Altera/Intel devices.
Experience in RTL development, simulation, and implementation for glue logic applications.
Experienced in electronics principles, circuit design, PCB design and layout.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field.
5 years of experience with enterprise class hardware systems design.
1 year of experience in technical leadership.
Experience in interfacing with other disciplines, including software, signal integrity, thermal and mechanical.
Experience with data center engineering, server, storage, and networking products.
Expertise in solving complex system issues, technical innovation and drive technical roadmap.

About the job

As a Hardware Design Engineer in the board and system design team, you will work on hardware systems projects to craft the solutions for current and future data center deployments. You will work with product teams to ensure that their goals are met with your systems. ASIC, Software, and Verification teams to ensure proper verification of features in your systems. You will ensure that the designs are manufacturable and ready for volume production. You will support systems that are deployed in the data center.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

The US base salary range for this full-time position is $142,000-$211,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

Lead FPGA/Complex Programmable Logic Device (CPLD) design flows using Lattice, Xilinx/AMD, or Altera/Intel devices.
Lead a sub-system and hardware design on data center hardware products. Drive product from concept to production.
Bring up systems and execute engineering validation in the lab.
Gather requirements, define high level architecture, execute hardware design and product validation.
Work closely with Engineering, Manufacturing, Product, and Deployment teams to productize designs and field support.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Source : Google