FPGA Design/Verification Engineer at ICONMA, LLC

• The selected candidate will be responsible for FPGA verification using the UVM methodology and following the Client processes.

Requirements:

• Experience with UVM verification methodology.
• Experience developing test cases based off given requirements.
• Experience building test benches for FPGA / ASIC designs to provide randomized stimulus.
• Experience identifying and implementing necessary test exclusions.
• Experience generating coverage reports (code and functional).

As an equal opportunity employer, ICONMA provides an employment environment that supports and encourages the abilities of all persons without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.

Amrick Singh

(732) 352-9687