Engineer, Senior Staff|6245 Engineer, Senior Staff|6245 - eTeam Inc.
San Diego, CA 92121-4202
About the Job
Job Title: Hardware Engineering - Engineer, Senior Staff
Job Location: San Diego, CA
Job Duration: 6+ Months
Job Description: TOP 5 REQUIRED SKILLS:
1. Physical synthesis
2. Low Power Design
3. STA
4. Conformal low power
5. Conformal Power aware logic equivalency check
REQUIRED EDUCATION:
* Bachelor s degree in Computer Science, Electrical/Electronics Engineering, Engineering or related field and 6+ years of Hardware Engineering or related work experience
-OR-
* Master s degree in Computer Science, Electrical/Electronics Engineering, Engineering or related work experience
-OR-
* PhD in Computer Science, Electrical/Electronics Engineering, Engineering or related field and 4+ of Hardware Engineering or related work experience
KEY WORDS:
implementation, synthesis, STA, low power, Formal verification
JOB DESCRIPTION:
Principal Duties and Responsibilities:
" Leverages advanced Hardware knowledge and experience to plan, optimize, verify, and test highly critical electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems.
" Participates in or leads the implementation of advanced design rules and processes for electronic hardware, equipment, and/or integrated circuitry.
" Conducts highly complex simulations and analyses of designs as well as implements designs with the best power, performance, and area.
" Collaborates with cross-functional teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality.
" Evaluates, characterizes, and develops Client manufacturing solutions for leading edge products in the most advanced processes and bring-up product to meet customer expectations and schedules.
" Evaluates reliability of highly critical materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity.
" Advises and leads engineers in the development of complex hardware designs, evaluating various design features to identify potential flaws or issues.
" Writes detailed technical documentation for highly complex Hardware projects; reviews technical documentation for junior engineers.
POSITION SPECIFIC INFORMATION:
Senior level Physical Synthesis implementation engineer.
" Working independently with little supervision.
" Using verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels. May require strong negotiation and influence, communication to large groups or high-level constituents.
" Completing tasks that require multiple steps that can be performed in various orders; tasks require simultaneously executing multiple cognitive abilities and maintaining information in short- or long-term memory.
" Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or conflicting; advanced data analysis and interpretation skills are required.
Principal Duties & Responsibilities
" Implement Hierarchical blocks of the DDR/system cache subsystem running the physical synthesis with Client Fusion Compiler.
" Work with RTL designers on managing complex power intent
" Manage timing constraints
" Trouble shoot upf issues in synthesis
" Run Conformal Low Power Checks on final netlist and resolve clp violations
" Run Power Aware Conformal Logic Equivalency Check: both RTL 2 Gate and Gate 2 Gate.
" Run STA on final netlist and support PD timing/congestion closure
" Work with RTL designers and PD team in evaluating and executing both manual and tool generated (Conformal eco) functional eco
Required Competencies (All competencies below are required upon entry)
" Analytical Skills - The ability to collect information and identify fundamental patterns/trends in data. This includes the ability to gather, integrate, and interpret information from several sources.
" Communication - The ability to convey information clearly and accurately, as well as choosing the most effective method of delivery (e.g., email, phone, face-to-face). This includes using a technically sound communication style both verbally and in writing.
" Getting Work Done - The ability to be organized, resourceful, and planful. This includes the ability to leverage multiple resources to get things done and Client out tasks in sufficient detail. This also includes the ability to get things done with fewer resources and in less time, work on multiple tasks at once without losing track, and foresee and plan around obstacles.
" Proficient in running Physical synthesis with Client Fusion Compiler on SoC Top Level blocks with complex power intent.
" Proficient running Cadence Conformal Low Power checks on block with complex power intent.
" Proficient in running Cadence Conformal Power Aware Logic Equivalency Checks.
" Proficient in running STA with Client PTSI.
Work Hours: 8:00 5:00 PST; with flexibility for project demands
Thank you.
Job Location: San Diego, CA
Job Duration: 6+ Months
Job Description: TOP 5 REQUIRED SKILLS:
1. Physical synthesis
2. Low Power Design
3. STA
4. Conformal low power
5. Conformal Power aware logic equivalency check
REQUIRED EDUCATION:
* Bachelor s degree in Computer Science, Electrical/Electronics Engineering, Engineering or related field and 6+ years of Hardware Engineering or related work experience
-OR-
* Master s degree in Computer Science, Electrical/Electronics Engineering, Engineering or related work experience
-OR-
* PhD in Computer Science, Electrical/Electronics Engineering, Engineering or related field and 4+ of Hardware Engineering or related work experience
KEY WORDS:
implementation, synthesis, STA, low power, Formal verification
JOB DESCRIPTION:
Principal Duties and Responsibilities:
" Leverages advanced Hardware knowledge and experience to plan, optimize, verify, and test highly critical electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems.
" Participates in or leads the implementation of advanced design rules and processes for electronic hardware, equipment, and/or integrated circuitry.
" Conducts highly complex simulations and analyses of designs as well as implements designs with the best power, performance, and area.
" Collaborates with cross-functional teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality.
" Evaluates, characterizes, and develops Client manufacturing solutions for leading edge products in the most advanced processes and bring-up product to meet customer expectations and schedules.
" Evaluates reliability of highly critical materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity.
" Advises and leads engineers in the development of complex hardware designs, evaluating various design features to identify potential flaws or issues.
" Writes detailed technical documentation for highly complex Hardware projects; reviews technical documentation for junior engineers.
POSITION SPECIFIC INFORMATION:
Senior level Physical Synthesis implementation engineer.
" Working independently with little supervision.
" Using verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels. May require strong negotiation and influence, communication to large groups or high-level constituents.
" Completing tasks that require multiple steps that can be performed in various orders; tasks require simultaneously executing multiple cognitive abilities and maintaining information in short- or long-term memory.
" Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or conflicting; advanced data analysis and interpretation skills are required.
Principal Duties & Responsibilities
" Implement Hierarchical blocks of the DDR/system cache subsystem running the physical synthesis with Client Fusion Compiler.
" Work with RTL designers on managing complex power intent
" Manage timing constraints
" Trouble shoot upf issues in synthesis
" Run Conformal Low Power Checks on final netlist and resolve clp violations
" Run Power Aware Conformal Logic Equivalency Check: both RTL 2 Gate and Gate 2 Gate.
" Run STA on final netlist and support PD timing/congestion closure
" Work with RTL designers and PD team in evaluating and executing both manual and tool generated (Conformal eco) functional eco
Required Competencies (All competencies below are required upon entry)
" Analytical Skills - The ability to collect information and identify fundamental patterns/trends in data. This includes the ability to gather, integrate, and interpret information from several sources.
" Communication - The ability to convey information clearly and accurately, as well as choosing the most effective method of delivery (e.g., email, phone, face-to-face). This includes using a technically sound communication style both verbally and in writing.
" Getting Work Done - The ability to be organized, resourceful, and planful. This includes the ability to leverage multiple resources to get things done and Client out tasks in sufficient detail. This also includes the ability to get things done with fewer resources and in less time, work on multiple tasks at once without losing track, and foresee and plan around obstacles.
" Proficient in running Physical synthesis with Client Fusion Compiler on SoC Top Level blocks with complex power intent.
" Proficient running Cadence Conformal Low Power checks on block with complex power intent.
" Proficient in running Cadence Conformal Power Aware Logic Equivalency Checks.
" Proficient in running STA with Client PTSI.
Work Hours: 8:00 5:00 PST; with flexibility for project demands
Thank you.
Source : eTeam Inc.