Design For Debug Engineer - Advanced Micro Devices, Inc

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THE ROLE:

As a Design-for-Debug (DFD) engineer, you should have DFT/DFD end to end execution experience from DFT/DFD spec definition to post silicon bring up. You will meet regularly with other functional team members such as Architects, Verification Engineers, Physical Designers, CAD Engineers, SoC Design Engineers, Product Engineers and Program Management to ensure successful and timely project completion.

THE PERSON:

As a member of the Strategic Silicon Solutions (S3) Business Unit within AMD, your execution will help bring to life customers Special requirements for designs to be used in a broad range of products, from tablets to gaming consoles to servers and more. You will work closely with architecture, IP design, SoC implementation team, Design Verification team and physical design team to achieve first pass silicon success. You should be able to work efficiently within a team environment and drive tasks to completion, all while demonstrating excellent oral, written and interpersonal communication skills!

KEY RESPONSIBILITIES:

• Working with a multi-discipline and international team of engineers on design-for-debug (DFD) architecture, design and methodology initiatives. 
• Performing DFD IP RTL design per micro-architectural specifications.
• Performing DFD RTL integration, synthesis, equivalency checking, timing analysis and closure including defining design constraints.
• Writing and maintain DFD documentation, presentation material and specifications.
• Getting design tool flows running at the IP component level.
• Support the integration/verification of DFD IP into other IP and at the SoC-level.
• Support post silicon bring up and debug.

PREFERRED EXPERIENCE:

• Understanding of Design For Test methodologies and DFT verification experience.
• Understanding various technologies that must work with DFD technology such as CPU’s, graphics engines, high-speed digital design, memory, and I/O controllers, etc. 
• Experience in solving logic design or timing issues with integration, synthesis, and PD teams.
• Working knowledge and experience in Verilog simulator and waveform debugging tools, proficiency in debugging both RTL and gate level simulations.
• Pre-Silicon test planning & validation, engagement with Design teams.
• Must have good communication skills and the ability to work in a worldwide team environment.
• Knowledge & experience of low power concepts, clock gating, power gating is a plus.

ACADEMIC CREDENTIALS:  

• BSEE/MSEE Electrical Engineering or Computer Engineering. 

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.