ASIC/RTL Design Engineer - Senior (US) - ObjectWin Technology
San Jose, CA 95124
About the Job
ASIC/RTL Design Engineer - Senior (US)
San Jose, CA 95124– 3 days Onsite
12 Months Contract
HM Notes:
JOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and AMD internal IP s. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC s in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.
EXPERIENCE AND EDUCATION:
- SoC Architecture;
- Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification, and supporting synthesis and timing closure.
- Working knowledge of ARM cores and other I/O standard interfaces.
- Roughly 10 years experience
- Bachelors in electrical engineering or computer engineering is acceptable
An ideal candidate would also exhibit: Strong communication and documentation skills, Good organizational, time management and multitasking skills, Strong initiative and discipline to follow-through, Technical leadership.
San Jose, CA 95124– 3 days Onsite
12 Months Contract
HM Notes:
- This is general SOC Design Engineer role.
- RTL Integration, coding exp required.
- Understanding interface of IP blocks required
- Documentation exp
- Verilog and system Verilog exp will be plus
- Verification exp will be plus but not looking for (verification engineers)
JOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and AMD internal IP s. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC s in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.
EXPERIENCE AND EDUCATION:
- SoC Architecture;
- Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification, and supporting synthesis and timing closure.
- Working knowledge of ARM cores and other I/O standard interfaces.
- Roughly 10 years experience
- Bachelors in electrical engineering or computer engineering is acceptable
An ideal candidate would also exhibit: Strong communication and documentation skills, Good organizational, time management and multitasking skills, Strong initiative and discipline to follow-through, Technical leadership.
Source : ObjectWin Technology