ASIC/FPGA Design Verification Engineer - Net2Source

Hi,

Net2Source is a Global Workforce Solutions Company headquartered at NJ, USA with its branch offices in Asia Pacific Region. We are one of the fastest growing IT Consulting companies across the USA and we are hiring " ASIC/FPGA Design Verification Engineer " for one of our clients. We offer a wide gamut of consulting solutions customized to our 450+ clients ranging from Fortune 500/1000 to Start-ups across various verticals like Technology, Financial Services, Healthcare, Life Sciences, Oil & Gas, Energy, Retail, Telecom, Utilities, Technology, Manufacturing, the Internet, and Engineering.

ASIC/FPGA Design Verification Engineer
Location: El Segundo, CA - 100% Onsite
Pay Rate: $55-$65/hr
 
Job Description:
Create UVM simulation plan from design specification. Create or modify UVC, Score Board, Monitor, and test cases. Verify until functional coverage and code coverage meet project threshold. Document results.


Required Skills:
• 5+ years of experience
• 1-2 years of UVM tool
• Cadence Xcelium verification tool

Thanks & Regards,

Swati Rai
Delivery Manager
Net2Source Inc.
270 Davidson Ave, Suite 704, Somerset, NJ 08873
Office: (201 ) 340-8700 x 547 | Cell: (201) 623-3468 | Email Id: swati.rai@net2source.com
Web: www.net2source.com | Social: Facebook | Twitter | LinkedIn
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